US 2021/0082945 A1 · SEMICONDUCTOR MEMORY DEVICE

Abstract

According to one embodiment, a semiconductor memory device includes a first insulating layer; a first conductive layer provided in the first insulating layer and extending in the first direction; a second conductive layer extending in the first direction and provided adjacent to the first conductive layer in a second direction; and a contact plug coupled to one surface of the first conductive layer in a third direction. Thicknesses in the third direction of portions of the first and second conductive layers that overlap the contact plug in the third direction are smaller than thicknesses in the third direction of portions of the first and second conductive layers that do not overlap the contact plug in the third direction.

Claims20

Dependent claims

A semiconductor memory device comprising:

a first insulating layer;
a first conductive layer provided in the first insulating layer and extending in the first direction;
a second conductive layer extending in the first direction and provided adjacent to the first conductive layer in a second direction intersecting the first direction;
and
a contact plug coupled to one surface of the first conductive layer in a third direction intersecting the first and second directions, wherein
thicknesses in the third direction of portions of the first and second conductive layers that overlap the contact plug in the third direction are smaller than thicknesses in the third direction of portions of the first and second conductive layers that do not overlap the contact plug in the third direction.

3 more elements

A semiconductor memory device comprising:

a first insulating layer;
a first conductive layer provided in the first insulating layer and extending in the first direction;
a first contact plug coupled to one surface of the first conductive layer in a second direction intersecting the first direction;
and
a second contact plug provided on a side of one surface of the first conductive layer in the second direction, wherein
a first thickness in the second direction of a portion of the first conductive layer that overlaps the first contact plug in the second direction is smaller than a second thickness in the second direction of a portion of the first conductive layer that does not overlap the first and second contact plugs in the second direction, and
a third thickness in the second direction of a portion of the first conductive layer that overlaps the second contact plug in the second direction is smaller than the second thickness.

4 more elements

A manufacturing method of a semiconductor memory device, comprising:

forming, in a first insulating layer, a first conductive layer and a second conductive layer extending in the first direction and aligned in a second direction intersecting the first direction;
forming a second insulating layer on the first insulating layer and on the first and second conductive layers;
removing a portion of the second insulating layer that is on the first and second conductive layers and exposing the first and second conductive layers;
removing the exposed first and second conductive layers to a first depth;
forming a third insulating layer on the first and second conductive layers that have been removed to the first depth;
forming a fourth insulating layer on the third insulating layer;
removing a portion of the fourth insulating layer that is above the first and second conductive layers and exposing a portion of the third insulating layer that is on the first and second conductive layers;
removing a portion of the third insulating layer that is on the first conductive layer and exposing the first conductive layer;
and
forming a third conductive layer on the exposed first conductive layer.

7 more elements

Dependencies are inferred from the claim text.

Semiconductor memory device

Life of this patent

Semiconductor memory device

Life of this patent

Abstract

Claims20