Semiconductor device

A semiconductor device comprising:

• a first stacked body disposed above a substrate and in which a plurality of conductive films extending in a first direction are interspatially arranged in a layering direction;
• a first separating member adjacent to, in a second direction intersecting the first direction, a first end of the first stacked body in the second direction, the first separating member extending in the first direction;
• a second separating member adjacent to, in the second direction, a second end of the first stacked body in the second direction, the second separating member extending in the first direction;
• a plurality of semiconductor channels each of which penetrates the first stacked body in the layering direction and couples to the substrate;
• a first region disposed in the substrate and including a first peak of a concentration profile of a first impurity of a first conductivity type, the first region extending from a surface of the substrate, through a depth range including a concentration profile of a second impurity of a second conductivity type higher in concentration than the concentration profile of the first impurity having the first peak, to a depth of an intersection of the concentration profile of the first impurity having the first peak and the concentration profile of the second impurity;
• and
• a second region disposed in the substrate and including a second peak of a concentration profile of a third impurity, the second region overlapping at least part of the first region in the layering direction, the concentration profile of the third impurity having the second peak being higher in concentration than the concentration profile of the first impurity through a depth direction of the second region, wherein
• the first region and the second region each extend in a substrate planer direction, and
• the second peak of the concentration profile of the third impurity in the second region which overlaps at least the part of the first region is formed within the substrate between the plurality of semiconductor channels in the substrate planer direction.