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US 2021/0082902 A1Published application
Semiconductor integrated circuit device
AssigneeSocionext Inc.
InventorIsaya Sobue
Life of this patent
Estimating the term…
Abstract
A capacitive element using VNW FETs is provided. First and second components each constituting a transistor are arranged in an X direction. From the first component, a first gate interconnect extends away from the second component, and a first top interconnect and a first bottom interconnect extend toward the second component. From the second component, a second gate interconnect extends toward the first component, and a second top interconnect and a second bottom interconnect extend away from the first component. The first top interconnect, the first bottom interconnect, and the second gate interconnect are connected.
Claims10
A semiconductor integrated circuit device comprising a capacitive element,
- wherein
- the capacitive element includes a first transistor and a second transistor,
- the first transistor has a first component including one vertical nanowire (VNW) FET or a plurality of VNW FETs arranged in a first direction with gates, tops, and bottoms of the VNW FETs being independently connected with each other,
- the second transistor has a second component including one VNW FET or a plurality of VNW FETs arranged in the first direction with gates, tops, and bottoms of the VNW FETs being independently connected with each other,
- the first component and the second component are placed side by side in the first direction,
- the first component includes
- a first gate interconnect connected with the gate of the VNW FET, extending from the VNW FET away from the second component in the first direction,
- a first top interconnect connected with the top of the VNW FET, extending from the VNW FET toward the second component in the first direction, and
- a first bottom interconnect connected with the bottom of the VNW FET, extending from the VNW FET toward the second component in the first direction,
- the second component includes
- a second gate interconnect connected with the gate of the VNW FET, extending from the VNW FET toward the first component in the first direction,
- a second top interconnect connected with the top of the VNW FET, extending from the VNW FET away from the first component in the first direction, and
- a second bottom interconnect connected with the bottom of the VNW FET, extending from the VNW FET away from the first component in the first direction, and
- the first top interconnect, the first bottom interconnect, and the second gate interconnect are connected.
11 more elements
A semiconductor integrated circuit device comprising a capacitive element,
- wherein
- the capacitive element includes a first transistor and a second transistor,
- the first transistor has a first component including one vertical nanowire (VNW) FET or a plurality of VNW FETs arranged in a first direction with gates, tops, and bottoms of the VNW FETs being independently connected with each other,
- the second transistor has a second component including one VNW FET or a plurality of VNW FETs arranged in the first direction with gates, tops, and bottoms of the VNW FETs being independently connected with each other,
- the first component and the second component are placed side by side in the first direction,
- the first component includes
- a first gate interconnect connected with the gate of the VNW FET, extending from the VNW FET away from the second component in the first direction,
- a first top interconnect connected with the top of the VNW FET, extending from the VNW FET toward the second component in the first direction, and
- a first bottom interconnect connected with the bottom of the VNW FET, extending from the VNW FET toward the second component in the first direction,
- the second component includes
- a second gate interconnect connected with the gate of the VNW FET, extending from the VNW FET away from the first component in the first direction,
- a second top interconnect connected with the top of the VNW FET, extending from the VNW FET toward the first component in the first direction, and
- a second bottom interconnect connected with the bottom of the VNW FET, extending from the VNW FET toward the first component in the first direction, and
- the first top interconnect and the second top interconnect are connected, and the first bottom interconnect and the second bottom interconnect are connected.
11 more elements
A semiconductor integrated circuit device comprising a capacitive element,
- wherein
- the capacitive element includes a first transistor and a second transistor,
- the first transistor has a first component including one vertical nanowire (VNW) FET or a plurality of VNW FETs arranged in a first direction with gates, tops, and bottoms of the VNW FETs being independently connected with each other,
- the second transistor has a second component including one VNW FET or a plurality of VNW FETs arranged in the first direction with gates, tops, and bottoms of the VNW FETs being independently connected with each other,
- the first component and the second component are placed side by side in the first direction,
- the first component includes
- a first gate interconnect connected with the gate of the VNW FET, extending from the VNW FET toward the second component in the first direction,
- a first top interconnect connected with the top of the VNW FET, extending from the VNW FET away from the second component in the first direction, and
- a first bottom interconnect connected with the bottom of the VNW FET, extending from the VNW FET away from the second component in the first direction,
- the second component includes
- a second gate interconnect connected with the gate of the VNW FET, extending from the VNW FET toward the first component in the first direction,
- a second top interconnect connected with the top of the VNW FET, extending from the VNW FET away from the first component in the first direction, and
- a second bottom interconnect connected with the bottom of the VNW FET, extending from the VNW FET away from the first component in the first direction, and
- the first gate interconnect and the second gate interconnect are connected.
11 more elements
Dependencies are inferred from the claim text.