Method for fabrication of high density logic and memory for advanced circuit architecture

A method of fabricating a semiconductor device, comprising:

• forming a first multilayer stack on a first surface of a first substrate, the first substrate having a second surface opposite the first surface of the first substrate, the first multilayer stack comprising alternating layers of a first material and a second material, the first multilayer stack including at least six layers epitaxially grown;
• forming a second multilayer stack on a second surface of a second substrate, the second substrate having a first surface opposite the second surface of the second substrate, the second multilayer stack comprising alternating layers of a third material and a fourth material, the second multilayer stack including at least six layers epitaxially grown;
• implanting ionized atoms to a predetermined depth in the first surface of the second substrate;
• forming a first bonding film on a top surface of the first multilayer stack and forming a second bonding film on a top surface of the second multilayer stack;
• aligning the first substrate with the second substrate such that the first bonding film is in contact with the second bonding film;
• annealing the first substrate and the second substrate to bond the first bonding film with the second bonding film and form a combined structure, the annealing also weakening a portion of the second substrate approximately at the predetermined depth of the implanting;
• removing the weakened portion of the second substrate;
• and
• forming at least one transistor device from the combined structure.