Graphene-Assisted Low-Resistance Interconnect Structures and Methods of Formation Thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShin-Yi Yang, Yu-Chen Chan, Min-Han Lee, Hai-Ching Chen, Shau-Lin Shue
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Abstract
A semiconductor structure is provided. The semiconductor structure comprises a first conductive feature embedded within a first dielectric layer, a via disposed over the first conductive feature, a second conductive feature disposed over the via, and a graphene layer disposed over at least a portion of the first conductive feature. The via electrically couples the first conductive feature to the second conductive feature.
Claims20
A semiconductor structure comprising:
- a first conductive feature embedded within a first dielectric layer;
- a via disposed over the first conductive feature;
- a second conductive feature disposed over the via, wherein the via electrically couples the first conductive feature to the second conductive feature;
- and
- a graphene layer disposed over at least a portion of the first conductive feature.
A semiconductor structure comprising:
- a first conductive feature and a second conductive feature embedded within a first dielectric layer and separated by a portion of the first dielectric layer;
- a first graphene layer disposed over the first conductive feature;
- a second graphene layer disposed over at least a first portion of the second conductive feature;
- a second dielectric layer disposed over the portion of the first dielectric layer;
- and
- a third conductive feature disposed over a second portion of the second conductive feature, wherein a bottom portion of the third conductive feature is horizontally separated from the first graphene layer by the second dielectric layer.
A method of manufacturing integrated circuit (IC) device, comprising:
- providing semiconductor substrate having an interlayer dielectric (ILD) layer disposed thereon;
- forming a first conductive feature and a second conductive feature within the ILD layer;
- forming a graphene layer, wherein a first portion of the graphene layer is formed over the first conductive feature, and a second portion of the graphene layer is formed over the second conductive feature;
- forming a dielectric layer over portions of the ILD layer not covered by the graphene layer;
- and
- forming a via feature over the first conductive feature, wherein the via feature is separated from the second conductive feature by the dielectric layer.
Dependencies are inferred from the claim text.