Memory system

A memory system comprising:

• a nonvolatile memory which comprises a plurality of memory cells capable of storing 4-bit data of first to fourth bits by sixteen threshold regions including a first threshold region indicating an erased state for erasing data and second to sixteenth threshold regions having higher voltage levels than a voltage level of the first threshold region and indicating a written state for writing data;
• and
• a controller configured to cause the nonvolatile memory to execute a first program for writing data of the first bit and the second bit and then cause the nonvolatile memory to execute a second program for writing data of the third bit and the fourth bit, wherein
• the n-th threshold region has a higher voltage level than the (n−1)-th threshold region (n is a natural number of two or more and sixteen or less), and
• among fifteen boundaries existing between adjacent threshold regions among the first to sixteenth threshold regions, the number of first boundaries used for determining a value of the data of the first bit, the number of second boundaries used for determining a value of the data of the second bit, the number of third boundaries used for determining a value of the data of the third bit, and the number of fourth boundaries used for determining a value of the data of the fourth bit are 2, 3, 5, 5 or 3, 2, 5, 5 in order.

A memory system comprising:

• a nonvolatile memory which comprises a plurality of memory cells capable of storing 4-bit data of first to fourth bits by sixteen threshold regions including a first threshold region indicating an erased state for erasing data and second to sixteenth threshold regions having higher voltage levels than a voltage level of the first threshold region and indicating a written state for writing data;
• and
• a controller configured to cause the nonvolatile memory to execute a first program for writing data of the first bit and the second bit and then cause the nonvolatile memory to execute a second program for writing data of the third bit and the fourth bit, wherein
• the n-th threshold region has a higher voltage level than the (n−1)-th threshold region (n is a natural number of two or more and sixteen or less), and
• among fifteen boundaries existing between adjacent threshold regions among the first to sixteenth threshold regions, the number of first boundaries used for determining a value of the data of the first bit, the number of second boundaries used for determining a value of the data of the second bit, the number of third boundaries used for determining a value of the data of the third bit, and the number of fourth boundaries used for determining a value of the data of the fourth bit are 4, 3, 4, 4 or 3, 4, 4, 4 or 4, 4, 3, 4 or 4, 4, 4, 3 in order.