A comparator
AssigneeNowi Energy B.V.
InventorGustavo Campos Martins
Life of this patent
Estimating the term…
Abstract
The invention relates to an asynchronous comparator that presents low average power consumption and short propagation delay. The comparator bias current is dependent on the differential input voltage in a way that the current increases when the differential input voltage is low and decreases when the differential input voltage is high.
Claims14
A comparator, arranged for operation under low average power consumption for comparing a first analogue input signal with a second analogue input signal, said comparator comprising:
- a first differential input stage comprising two input switches forming an input differential pair, for comparison of a transition between said first and second analogue input signals;
- a output stage for providing a digital output of said comparator in accordance with a difference between said first and second analogue input signals;
- a bias current stage for providing a bias current to said differential input stage, characterized in that said bias current stage provides said bias current in correspondence with said first and second analogue input signals.
A sensor device comprising:
- a sensor, arranged for performing a measurement and arranged for generating an analogue input signal;
- a digital control unit, arranged for processing sensor measurement data;
- a comparator circuit for converting said analogue input signal of said sensor data to digital sensor measurement data for said digital control unit, and wherein said comparator circuit comprises a comparator, arranged for operation under low average power consumption for comparing a first analogue input signal with a second analogue input signal, said comparator comprising:
- a first differential input stage comprising two input switches forming an input differential pair, for comparison of a transition between said first and second analogue input signals;
- a output stage for providing a digital output of said comparator in accordance with a difference between said first and second analogue input signals;
- a bias current stage for providing a bias current to said differential input stage, characterized in that said bias current stage provides said bias current in correspondence with said first and second analogue input signals.
A comparator, arranged for operation under low average power consumption for comparing a first analogue input signal with a second analogue input signal, said comprising:
- a first transistor, which provides a bias current to said comparator, said first transistor having a gate connected to a gate and drain of a second transistor and a drain connected to a source of a third and a fourth transistor;
- said third and fourth transistor forming a first differential pair, and having gates connected to input nodes of the comparator, and having drains connected to a gate and a source of a fifth and a sixth transistor, respectively, and to an output or second stage of the comparator;
- said sixth transistors having a gate and source connected to a gate of a seventh transistor;
- said seventh transistor having a drain connected to said source and gate of said second transistor.
Dependencies are inferred from the claim text.