Semiconductor memory device and method for manufacturing semiconductor memory device

A method for manufacturing a semiconductor memory device, the method comprising:

• forming a stacked body disposed in a first tier, the stacked body including a plurality of first layers stacked via a second layer;
• forming a first pillar and a second pillar in parallel, the first pillar extending in the stacked body in a stacking direction of the stacked body, the first pillar being for forming a plurality of memory cells at respective intersections of the first pillar and at least part of the plurality of first layers, and the second pillar extending, in the stacking direction, in the first tier of a misalignment inspection region outside the stacked body;
• forming a first hole in a second tier upper than the first tier such that the first hole is superposed on the first pillar, and forming, in parallel with the first hole formation, a second hole in the second tier in the misalignment inspection region such that the second hole is superposed on the second pillar;
• and
• inspecting misalignment between the first pillar and the first hole by observing the second pillar via the second hole.

A method for manufacturing a semiconductor memory device, the method comprising:

• forming a stacked body disposed in a first tier, the stacked body including a plurality of first layers stacked via a second layer;
• forming a first pillar and a second pillar in parallel, the first pillar extending in the stacked body in a stacking direction of the stacked body, the first pillar being for forming a plurality of memory cells at respective intersections of the first pillar and at least part of the plurality of first layers, and the second pillar extending, in the stacking direction, in the first tier of a misalignment inspection region outside the stacked body;
• forming a contact that is connected, outside the stacked body, to a peripheral circuit that contributes to operation of the memory cells, the contact extending in the first tier in the stacking direction;
• forming a wiring groove in a second tier upper than the first tier outside the stacked body such that the wiring groove is superposed on the contact, and forming, in parallel with the wiring groove formation, a recess in the second tier in the misalignment inspection region such that the recess is superposed on the second pillar;
• and
• inspecting misalignment between the contact and the wiring groove by observing the recess together with the second pillar.