Semiconductor storage device
AssigneeKioxia Corporation
InventorTeruo Takagiwa
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Abstract
According to one embodiment, a semiconductor storage device is disclosed. The device includes a memory cell array including memory cells, bit lines connected to the memory cell array, sense amplifier units provided to correspond to bit lines and arranged in a matrix of M rows and N columns, data latches provided to correspond to sense amplifier units and arranged in a matrix of S rows and T columns. M, N, S, and T are positive integers, satisfying M<S, N>T, and S×T=M×N. A dimension of each of the sense amplifier units in an arrangement direction of the N columns is smaller than a dimension of each of the data latches in an arrangement direction of the T columns.
Claims13
A semiconductor storage device comprising:
- a memory cell array including a plurality of memory cells;
- a plurality of bit lines connected to the memory cell array;
- a plurality of sense amplifier units provided to correspond to the plurality of bit lines and arranged in a matrix of M rows and N columns;
- and
- a plurality of data latches provided to correspond to the plurality of sense amplifier units and arranged in a matrix of S rows and T columns,
- wherein
- M, N, S, and T are positive integers, satisfying M<S, N>T, and S×T=M×N, and
- a dimension of each of the sense amplifier units in an arrangement direction of the N columns is smaller than a dimension of each of the data latches in an arrangement direction of the T columns.
Dependencies are inferred from the claim text.