Comparison operations in memory

A system, comprising:

• a host device configured to generate instructions;
• and
• a memory device configured to execute instructions from the host device to:
• write, to first memory cells coupled to a sense line of an array of memory cells, first data representative of a first value of the plurality;
• write, to second memory cells coupled to the sense line, second data representative of a second value of the plurality;
• and
• activate, sequentially, individually, and independently, select lines coupled to the first and second memory cells to compare the first value to the second value.

An apparatus, comprising:

• sensing circuitry comprising respective sense amplifiers and respective compute components coupled to each of a plurality of pairs of complementary sense lines of an array of memory cells,
• wherein the sensing circuitry is configured to perform a sequence of logical operations, using the compute components, on:
• first data representative of first values stored by first memory cells of the array of memory cells;
• and
• second data representative of second values stored by second memory cells of the array of memory cells,
• wherein performance of the sequence of logical operations comprises:
• a comparison of the first values to the second values;
• and
• sequential, individual, and independent activation of select lines of the array of memory cells coupled to the first and second memory cells.