Image sensor, column parallel adc circuit and a/d conversion method thereof

An image sensor, configured to operably capture an image, the image sensor comprising:

• a column parallel analog-to-digital converter (ADC) circuit, configured to operably convert plural analog signals to respective plural digital signals;
• and
• an array of pixel sensing circuits, coupled to the column parallel ADC circuit and configured to operably sense the image;
• the column parallel ADC circuit including:
• plural column ADCs, configured to operably generate respective plural digital counts, wherein the plural column ADCs include a first column ADC and a second column ADC, wherein the first column ADC is configured to operably generate a first digital count according to a first analog signal, and the second column ADC is configured to operably generate a second digital count according to a second analog signal, wherein the first digital count is a difference between a first digital signal and a second digital signal, wherein the first and the second digital signals correspond to the first and the second analog signals respectively;
• and
• a digital processing circuit, configured to operably generate the plural digital signals, wherein the digital processing circuit generates the first digital signal according to the first digital count and the second digital signal;
• wherein the array of the pixel sensing circuits are formed in at least one row and plural columns corresponding to the plural column ADCs, wherein each column of the pixel sensing circuits is configured to operably generate one corresponding analog signal which is coupled to one corresponding column ADC.

An analog-to-digital (A/D) conversion method, configured to operably convert plural analog signals to respective plural digital signals, the A/D conversion method comprising:

• generating a first digital count according to a first analog signal;
• generating a second digital count according to a second analog signal, wherein the first digital count is a difference between a first digital signal and a second digital signal, wherein the first and the second digital signals correspond to the first and the second analog signals respectively;
• and
• generating the first digital signal according to the first digital count and the second digital signal.