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US 2020/0403769 A1Published application
Low power edge and data sampling
AssigneeRambus Inc.
InventorJared L. Zerbe
Life of this patent
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Abstract
An integrated circuit receiver is disclosed comprising a data receiving circuit responsive to a timing signal to detect a data signal and an edge receiving circuit responsive to the timing signal to detect a transition of the data signal. One of the data or edge receiving circuits comprises an integrating receiver circuit while the other of the data or edge sampling circuits comprises a sampling receiver circuit.
Claims21
(canceled)
An integrated circuit receiver comprising:
- a data receiving circuit including an integrating receiver to receive a data signal and generate an integrated data output signal in response to a timing signal;
- and
- an edge receiving circuit including a non-integrating receiver to receive the data signal and generate a non-integrated output edge signal in response to the timing signal.
A method of operation in an integrated circuit receiver, the method comprising:
- receiving a data signal;
- receiving a timing signal created synchronous with the data signal;
- detecting a data value in the valid data region in response to the timing signal in an integrating manner;
- detecting an edge value in the transition region in response to the timing signal in a non-integrating manner to generate early/late information;
- wherein detecting the data value in the valid data region comprises integrating the data signal in response to the timing signal to generate an integrated output and sampling the integrated output.
2 more elements
An integrated circuit (IC) chip, comprising:
- receiver circuitry to receive a data signal and a timing signal, the receiver circuitry including
- a data receiving circuit including an integrating receiver to receive the data signal and generate an integrated data output signal in response to the timing signal;
- and
- an edge receiving circuit including a non-integrating receiver to receive the data signal and generate a non-integrated output edge signal in response to the timing signal.
1 more element
Dependencies are inferred from the claim text.