Method for minimizing dc capacitance for cascade multilevel converter

A method for minimizing DC capacitance of a cascade multilevel converter, where in the method comprises steps of:

• step 1:
• measuring an initial value Vn0(n=1, 2, . . . , N) of each of capacitor voltages of H-bridges and a grid-connected current ig, and then using an reactive current detection algorithm, to obtain an reactive current given signal Iqref;
• step 2:
• as balancing the capacitor voltages, instantaneous estimation values of the capacitor voltages of N H-bridges are equal, that is, Vc1=Vc2=Vc3= . . . =VcN, an expression for the instantaneous estimation values of the capacitor voltages of the H-bridges is:
• V
• c
• 
• n
• =
• C
• 
• V
• 1
• 
• 0
• 2
• +
• C
• 
• V
• 2
• 
• 0
• 2
• +
• ⋯
• +
• C
• 
• V
• N
• 
• 0
• 2
• +
• L
• 
• i
• g
• 2
• +
• 2
• 
• ∫
• t
• 0
• t
• 
• i
• g
• 
• v
• g
• 
• d
• 
• t
• N
• 
• C
• calculating to obtain a value of the instantaneous estimation value Vcn(n=1, 2, . . . , N) of the capacitor voltage of the H-bridges;
• in the expression for the instantaneous estimation values of the capacitor voltage of the H-bridges, C is a capacitance value of each of the H-bridges in a cascade multilevel converter system;
• V10, V20, . . . , VN0 is the initial value Vn0(n=1, 2, . . . , N) of the capacitor voltage of each of the H-bridges measured in the step 1;
• L is a total inductance value in the cascade multilevel converter system;
• ig is the grid-connected current value in the cascade multilevel converter system;
• vg is a grid voltage value in the cascade multilevel converter system;
• t0 is an initial time in the cascade multilevel converter system and t is a current time in the cascade multilevel converter system;
• Step 3:
• multiplying Vcn(n=1,2, . . . , N) by the total number N of the H-bridges to obtain N*Vcn, Σucn=uc1+uc2+uc3+ . . . +ucN is a sum of the instantaneous values of the capacitor voltages of the H-bridges, and subtracting Σucn from N*Vcn as an input of the voltage control loop PR controller;
• when the grid voltage and the grid-connected current are in the same direction, a logic signal g is 1;
• and when the grid voltage and the grid-connected current are in the opposite direction, the logic signal g is −1;
• multiplying the output of the voltage control loop PR controller by the logic signal g to obtain a signal Idref;
• Step 4:
• subtracting the signal Idref from the reactive current given signal Iqref, and then subtracting the grid-connected current ig as the input of the current control loop PR controller, and to be output as a modulation signal uref;
• Step 5, dividing a sum Σucn of the instantaneous values of the capacitor voltages of the N H-bridges by the total number N of the H-bridges to obtain an average value
• ∑
• u
• c
• 
• n
• N
• of the instantaneous values of the capacitor voltages, and subtracting the instantaneous values ucn of the capacitor voltages of the H-bridges from the
• ∑
• u
• c
• 
• n
• N
• as an input signal of a capacitor voltage balancing control loop PI controller;
• dividing the grid-connected current ig by a peak value of the grid-connected current to obtain an adjustment signal S;
• multiplying the output signal of the capacitor voltage balancing control loop PI controller by the adjustment signal S to obtain a fine adjustment signal Δuref−n;
• and Step 6:
• adding the modulation signal uref output by the current control loop PR controller to the fine adjustment signal Δuref−n output by the capacitor voltage balancing control loop PI controller to obtain a modulation signal uref−n, which generates a driving signal for controlling switches of the H-bridges through a PWM generator to control on-off of the switches.