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US 2020/0403073 A1Published application
Semiconductor device and method of manufacturing the same
AssigneeRenesas Electronics Corporation
InventorTatsuyoshi Mihara
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Abstract
In order to improve the reliability of a semiconductor device, in a memory cell of a split-gate type MONOS memory formed on a fin, a drain region is formed in an epitaxial layer on the fin, and a source region is formed in the fin, and a silicide layer is formed on an upper surface of the fin in which the source region is formed.
Claims14
A semiconductor device comprising:
- a semiconductor substrate having a first region;
- a first protruding portion protruded from a bottom surface of a first groove formed in an upper surface of the semiconductor substrate, and extended in a first direction along the upper surface of the semiconductor substrate, the first protruding portion being a part of the semiconductor substrate in the first region;
- a first gate electrode formed on each of an upper surface of the first protruding portion and a side surface of the first protruding portion via a first insulating film, and extended in a second direction crossing to the first direction in plan view;
- a second gate electrode formed on each of the upper surface of the first protruding portion and the side surface of the first protruding portion via a second insulating film including a charge storage portion, and adjacent to one side surface of the first gate electrode via a third insulating film, and extended in the second direction;
- a first semiconductor layer formed on the upper surface of the first protruding portion located on the first gate electrode side, the first protruding portion sandwiching both the first gate electrode and the second gate electrode in plan view;
- a first semiconductor region formed in the first semiconductor layer, the first semiconductor region being a first conductive type region;
- a second semiconductor region formed in the first protruding portion located on the second gate electrode side, the second semiconductor region being the first conductive type region;
- and
- a silicide layer contacted with an upper surface of the second semiconductor region,
- wherein a width of the first semiconductor layer is larger than a width of the first protruding portion, and
- wherein the first gate electrode, the second gate electrode, the second insulating film, the first semiconductor region and the second semiconductor region compose a non-volatile memory element.
8 more elements
A method of manufacturing a semiconductor device, comprising:
- (a) preparing a semiconductor substrate having a first region;
- (b) forming a first protruding portion, by forming a first groove on an upper surface of the semiconductor substrate in the first region, protruded from a bottom surface of the first groove, and extended in a first direction along the upper surface of the semiconductor substrate, the first protruding portion being comprised of a part of the semiconductor substrate in the first region;
- (c) forming an element isolation film filling the first groove located around the first protruding portion;
- (d) forming a first gate electrode on each of an upper surface of the first protruding portion and a side surface of the first protruding portion via a first insulating film, and forming a second gate electrode on each of the upper surface of the first protruding portion and the side surface of the first protruding portion via a second insulating film including a charge storage portion, the first gate electrode being extended in a second direction crossing to the first direction in plan view, the second gate electrode being adjacent to one side surface of the first gate electrode via a third insulating film, and the second gate electrode being extended in the second direction;
- (e) forming a first epitaxial layer on the upper surface of the first protruding portion located on the first gate electrode side, the first protruding portion sandwiching both the first gate electrode and the second gate electrode in plan view;
- (f) forming a first semiconductor region in the first epitaxial layer, and forming a second semiconductor region in the first protruding portion located on the second gate electrode side, the first semiconductor region being a first conductive type region, and the second semiconductor region being the first conductive type region;
- and
- (g) after the (f), forming a first silicide layer on each of an upper surface of the first gate electrode and an upper surface of the second gate electrode, and forming a second silicide layer on the upper surface of the first protruding portion located on the second gate electrode side, the second silicide layer being electrically connected with the second semiconductor region,
- wherein the first gate electrode, the second gate electrode, the second insulating film, the first semiconductor region and the second semiconductor region compose a non-volatile memory element.
6 more elements
Dependencies are inferred from the claim text.