Fully Digital Glitch Detection Mechanism with Process and Temperature Compensation

A processing system, comprising:

• a measurement hardware unit formed with standard logic cells and connected to a monitored line, the measurement hardware unit comprising a configurable initial delay circuit, a plurality of delay elements, and a plurality of capture flops, where the initial delay circuit imposes an initial delay to compensate for process variations, and where the plurality of capture flops is connected to capture logic values from the plurality of delay elements to provide a digitized representation of a delay value during a sampling period;
• a digital converter hardware unit connected to convert the digitized representation of the delay value into a numerical measurement result for the sampling period;
• and
• an error detection unit connected to generate an output error signal if a difference between the numerical measurement result and a reference value exceeds a programmable margin indicating a positive or negative glitch on the monitored line.

An integrated circuit (IC) System-on-Chip (SoC) device, comprising:

• a monitored line;
• a digital measurement unit formed with standard cells comprising:
• a toggle signal generator for generating a toggle signal,
• an initial delay circuit connected to generate a delayed toggle signal by imposing an initial delay on the toggle signal to compensate for process variations in the fabrication of the SoC device,
• a delay line comprising a plurality of delay elements connected to measure a glitch-induced delay in the delayed toggle signal,
• a plurality of capture devices connected to capture logic values from the plurality of delay elements which provide a digitized representation of the glitch-induced delay, and
• a digital converter unit connected to convert the digitized representation of the glitch-induced delay into a numerical measurement result for the sampling period;
• and
• an error detector configured to apply digital post-processing to the numerical measurement result for generating an error signal if a difference between the numerical measurement result and a computed reference value exceeds a programmable margin.