Fins for enhanced die communication
AssigneeInternational Business Machines Corporation
InventorsCharles Leon Arvin, Richard Francis Indyk, Bhupender Singh, Jon Alfred Casey
Life of this patent
Estimating the term…
Abstract
Semiconductor structures are provided in which a first chip on a substrate has at least one first protruding section, the first protruding section including first interconnect locations, a second chip on the substrate having at least one second protruding section, the second protruding section including second interconnect locations and the first chip and the second chip are arranged such that the first protruding section is interdigitated with the second protruding section.
Claims15
A semiconductor structure comprising:
- a first chip on a wafer having at least one first protruding section, the first protruding section comprising first interconnect locations, wherein the at least one first protruding section extends from an edge of the first chip at an angle of about 45°;
- and
- a second chip on the wafer having at least one second protruding section, the second protruding section comprising second interconnect locations, wherein the at least one second protruding section extends from an edge of the second chip at an angle of about 45°,
- wherein the first chip and the second chip are arranged such that the first protruding section is interdigitated with the second protruding section, wherein at least a portion of at least one of the first chip and the second chip is within 50 to 500 microns of a corner of the other chip or within 50 to 500 microns of an edge of the other chip.
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A semiconductor structure comprising:
- a first chip on a wafer having at least one first protruding section, the first protruding section comprising first interconnect locations;
- and
- a second chip on the wafer having at least one second protruding section, the second protruding section comprising second interconnect locations,
- wherein the first chip comprises a first PCI (peripheral component interconnect) and the second chip comprises a second PCI, and wherein the first PCI is connected to the first chip and is coupled to the substrate.
A semiconductor structure comprising:
- a first chip on a substrate having at least one first protruding section, the first protruding section comprising first interconnect locations;
- a second chip on the substrate having at least one second protruding section, the second protruding section comprising second interconnect locations;
- and
- a bridge connected to the first chip and connected to the second chip, wherein the bridge is aligned to the orientation of the first chip and the second chip,
- wherein the first chip and the second chip are arranged such that the first protruding section is interdigitated with the second protruding section, and wherein the bridge substantially covers the interdigitated at least one first protruding section and the at least one second protruding section.
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Dependencies are inferred from the claim text.