Integrated circuit with buried power rail and methods of manufacturing the same

A method of manufacturing an integrated circuit having buried power rails, the method comprising:

• forming a first dielectric layer on an upper surface of a first semiconductor substrate;
• forming a conductive layer on an upper surface of the first dielectric layer;
• etching the conductive layer to form the buried power rails;
• forming a second dielectric layer on the upper surface of the first dielectric layer and around the buried power rails;
• forming a third dielectric layer on an upper surface of the second dielectric layer and upper surfaces of the buried power rails;
• forming a fourth dielectric layer on a donor wafer;
• bonding the fourth dielectric layer to the third dielectric layer;
• and
• forming a plurality of semiconductor devices, vias, and metal interconnects on or in the donor wafer,
• wherein the buried power rails are encapsulated by the second dielectric layer and the third dielectric layer, and
• wherein the buried power rails are below the plurality of semiconductor devices.

An integrated circuit comprising:

• a first semiconductor substrate;
• a first dielectric layer on the first semiconductor substrate;
• buried power rails accommodated in the first dielectric layer;
• a second dielectric layer on the first dielectric layer and the buried power rails;
• and
• a plurality of active devices, vias, and metal interconnects on the second dielectric layer.