Controlling coarse pixel size from a stencil buffer

A system comprising:

• a display;
• a two-dimensional (2D) texture memory;
• a graphics pipeline coupled to the display;
• and
• logic to:
• identify a first level of detail for a scene, and
• determine a first 2D texture value based on the first level of detail, wherein the first 2D texture value corresponds to a first pixel size, wherein the first 2D texture value is to include a first range of bits defining a first dimension of the first pixel size and a second range of bits defining a second dimension of the first pixel size.

An apparatus comprising:

• a substrate;
• and
• logic coupled to the substrate, wherein the logic is implemented in one or more of configurable logic or fixed-functionality hardware logic, the logic coupled to the substrate to:
• identify a first level of detail for a scene, and
• determine a first 2D texture value based on the first level of detail, wherein the first 2D texture value corresponds to a first pixel size, wherein the first 2D texture value is to include a first range of bits defining a first dimension of the first pixel size and a second range of bits defining a second dimension of the first pixel size.