Integrated circuit chip apparatus
AssigneeCambricon Technologies Corporation Limited
InventorsShaoli Liu, Xinkai Song, Bingrui Wang, Yao Zhang, Shuai Hu
Life of this patent
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Abstract
An integrated circuit chip apparatus and a processing method performed by an integrated circuit chip apparatus are disclosed. The disclosed integrated circuit chip apparatus and processing method are used for executing a multiplication operation, a convolution operation, or a training operation of a neural network. The present technical solution has the advantages of a reduced computational cost and low power consumption.
Claims20
An integrated circuit chip apparatus, comprising:
- a main processing circuit and a plurality of basic processing circuits, wherein the main processing circuit comprises a data type conversion circuit configured to convert data between a floating point data type and a fixed point data type;
- wherein the main processing circuit is configured to:
- receive an input data block, a weight data block, and a multiplication instruction;
- convert the input data block and the weight data block to an input data block of the fixed point type and a weight data block of the fixed point type, respectively, using the data type conversion circuit;
- designate the input data block of the fixed point type as a distribution data block and the weight data block of the fixed point type as a broadcasting data block according to the multiplication instruction;
- partition the distribution data block to obtain a plurality of basic data blocks;
- distribute the plurality of basic data blocks to at least one of the plurality of basic processing circuits;
- and
- broadcast the broadcasting data block to the plurality of basic processing circuits;
- wherein the at least one of the plurality of basic processing circuits is configured to perform computations on the broadcasting data block and the received basic data blocks according to the fixed point type to obtain computation results, and transfer the computation results to the main processing circuit;
- wherein the main processing circuit is configured to process the computation results to obtain an instruction result of the multiplication instruction.
A processing method performed by an integrated circuit chip apparatus that comprises a main processing circuit and a plurality of basic processing circuits, wherein the main processing circuit comprises a data type conversion circuit configured to convert data between a floating point data type and a fixed point data type, wherein the processing method comprises:
- receiving an input data block, a weight data block, and a multiplication instruction;
- converting, by the data type conversion circuit, the input data block and the weight data block to an input data block of the fixed point type and a weight data block of the fixed point type, respectively;
- designating the input data block of the fixed point type as a distribution data block and the weight data block of the fixed point type as a broadcasting data block according to the multiplication instruction;
- partitioning, by the main processing unit, the distribution data block to obtain a plurality of basic data blocks;
- distributing, by the main processing circuit, the plurality of basic data blocks to at least one of the plurality of basic processing circuits;
- broadcasting, by the main processing circuit, the broadcasting data block to the plurality of basic processing circuits;
- performing computations, by the at least one of the plurality of basic processing circuits, on the broadcasting data block and the received basic data blocks according to the fixed point type to obtain computation results;
- transfer, by the at least one of the plurality of basic processing circuits, the computation results to the main processing circuit;
- and
- processing, by the main processing circuit, the computation results to obtain an instruction result of the multiplication instruction.
A neural network computation device, comprising one or more integrated circuit chip apparatuses, each integrated circuit chip apparatus comprising:
- a main processing circuit and a plurality of basic processing circuits, wherein the main processing circuit comprises a data type conversion circuit configured to convert data between a floating point data type and a fixed point data type;
- wherein the main processing circuit is configured to:
- receive an input data block, a weight data block, and a multiplication instruction;
- convert the input data block and the weight data block to an input data block of the fixed point type and a weight data block of the fixed point type, respectively, using the data type conversion circuit;
- designate the input data block of the fixed point type as a distribution data block and the weight data block of the fixed point type as a broadcasting data block according to the multiplication instruction;
- partition the distribution data block to obtain a plurality of basic data blocks;
- distribute the plurality of basic data blocks to at least one of the plurality of basic processing circuits;
- and
- broadcast the broadcasting data block to the plurality of basic processing circuits;
- wherein the at least one of the plurality of basic processing circuits is configured to perform computations on the broadcasting data block and the received basic data blocks according to the fixed point type to obtain computation results, and transfer the computation results to the main processing circuit;
- wherein the main processing circuit is configured to process the computation results to obtain an instruction result of the multiplication instruction.
Dependencies are inferred from the claim text.