Method and apparatus for implementing data transmission, electronic device, and computer-readable storage medium

An apparatus for implementing data transmission between two buses of different types, wherein one of the two buses is associated with an FPGA instance among multiple FPGA instances run by a computing service provided by the apparatus and the other of the two buses corresponds to an external device to the apparatus, the apparatus comprising a memory for storing computer readable instructions and a processor in communication with the memory, wherein the processor is configured to execute the computer readable instructions to cause the apparatus to:

• obtain an access instruction from an initiator through a first bus of the two buses for data read/write in a target, wherein the initiator and the target are associated with the first bus and a second bus of the two buses, and comprise one and the other of the FPGA instance and the external device, respectively;
• buffer the access instruction into an instruction storage area corresponding to the access instruction;
• and
• transmit the access instruction buffered in the instruction storage area to the target continuously, and suspend transmission of the access instruction to the target once a flow control is imposed.

A non-transitory storage medium storing computer readable instructions, wherein the instructions, when executed by a processor for implementing data transmission between two buses of different types with one of the two buses being associated with an FPGA instance among multiple FPGA instances run by a computing service provided by the processor and the other of the two buses corresponding to an external device to the processor, cause the processor to:

• obtain an access instruction from an initiator through a first bus of the two buses for data read/write in a target, wherein the initiator and the target are associated with the first bus and a second bus of the two buses, and comprise one and the other of the FPGA instance and the external device, respectively;
• buffer the access instruction into an instruction storage area corresponding to the access instruction;
• and
• transmit the access instruction buffered in the instruction storage area to the target continuously, and suspend transmission of the access instruction to the target once a flow control is imposed.