Wave pipeline including synchronous stage

A memory comprising:

• a memory array;
• a synchronous data stage to output data from the memory array in response to an address signal, the synchronous data stage comprising a first data latch to latch the output data;
• an address path coupled to an input of the synchronous data stage, the address path comprising a plurality of wave pipeline address stages;
• a data path coupled to an output of the synchronous data stage, the data path comprising a plurality of wave pipeline data stages;
• an input clock path comprising a plurality of input clock stages corresponding to the plurality of wave pipeline address stages, each input clock stage of the plurality of input clock stages comprising a delay configured to be equal to a delay of the corresponding wave pipeline address stage of the plurality of wave pipeline address stages;
• and
• a return clock path coupled to the input clock path at the first data latch, the return clock path comprising a plurality of return clock stages corresponding to the plurality of wave pipeline data stages, a delay of each return clock stage of the plurality of return clock stages equal to a delay of the corresponding wave pipeline data stage of the plurality of wave pipeline data stages,
• wherein the first data latch latches the output data in response to a clock signal on the input clock path.

A method for processing data through a wave pipeline, the method comprising:

• asynchronously processing data through a first wave pipeline data stage;
• delaying a clock signal to align the clock signal with the data from the first wave pipeline data stage;
• processing the data from the first wave pipeline data stage through a synchronous data stage;
• latching the data from the synchronous data stage in response to the delayed clock signal, the delayed clock signal providing a return clock signal;
• processing the latched data through a second wave pipeline data stage;
• and
• delaying the return clock signal to align the return clock signal with the data from the second wave pipeline data stage.