Volatile memory cache line directory tags
AssigneeHewlett Packard Enterprise Development LP
InventorsRobert C. Elliott, James A. Fuxa
Life of this patent
Estimating the term…
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AssigneeHewlett Packard Enterprise Development LP
InventorsRobert C. Elliott, James A. Fuxa
Estimating the term…
An example memory system may include a central processing unit (CPU) comprising a CPU cache, a storage class memory, a volatile memory and a memory controller. The memory controller is to store, in the storage class memory, a first cache line including first data and a first directory tag corresponding to the first data. The memory controller is to further store, in the storage class memory, a second cache line including second data and a second directory tag corresponding to the second data. The memory controller is to store, in the volatile memory, a third cache line that comprises the first directory tag and the second directory tag, the third cache line excluding the first data and the second data.
A memory system comprising:
A method comprising:
(canceled)
(canceled)
A non-transitory computer-readable medium containing instructions to direct a first central processing unit (CPU) to:
(canceled)
Dependencies are inferred from the claim text.