Memory system, memory controller, and meta-information storage device
AssigneeSK hynix Inc.
InventorJeen PARK
Life of this patent
Estimating the term…
Abstract
Embodiments of the present disclosure relate to a memory system, a memory controller, and an operation method. The embodiments receive a plurality of requests for a memory device, determine the number of hit requests and the number of miss requests with respect to the plurality of received requests, and determine whether or not to perform all or some of map data read operations for the respective miss requests in parallel and whether or not to perform all or some of user data read operations for the respective hit requests in parallel, thereby minimizing the time required for processing the plurality of requests.
Claims20
A memory system comprising:
- a memory device comprising a plurality of planes;
- and
- a memory controller configured to:
- receive a plurality of requests for the memory device;
- determine, among the plurality of requests, a number of hit requests that hit on any of map segments loaded in a map cache and a number of miss requests that do not hit on any of the map segments loaded in the map cache;
- and
- determine, based on the number of hit requests and the number of miss requests, whether or not to perform all or some of map data read operations for the respective miss requests in parallel and whether or not to perform all or some of user data read operations for the respective hit requests in parallel.
A memory controller comprising:
- a memory interface configured to communicate with a memory device comprising a plurality of planes;
- and
- a control circuit configured to:
- receive a plurality of requests for the memory device;
- determine, among the plurality of requests, a number of hit requests that hit on any of map segments loaded in a map cache and a number of miss requests that do not hit on any of the map segments loaded in the map cache;
- and
- determine, based on the number of hit requests and the number of miss requests, whether or not to perform all or some of map data read operations for the respective miss requests in parallel and whether or not to perform all or some of user data read operations for the respective hit requests in parallel.
A method of operating a memory system comprising a memory device comprising a plurality of planes and a memory controller configured to control the memory device, the method comprising:
- receiving, by the memory controller, a plurality of requests for the memory device;
- determining, among the plurality of requests, the number of hit requests that hit on any of map segments loaded in a map cache and the number of miss requests that do not hit on one of the map segments loaded in the map cache;
- and
- determining, based on the number of hit requests and the number of miss requests, whether or not to perform all or some of map data read operations for the respective miss requests in parallel and whether or not to perform all or some of user data read operations for the respective hit requests in parallel.
Dependencies are inferred from the claim text.