Device of Memory Modules

A device of memory modules, comprising

• at least a substrate;
• a controller,
• wherein said controller connects to said substrate to read and control command signals, address signals, and timing signals;
• at least a tap,
• wherein said tap is disposed on said substrate and connects to said controller;
• said tap comprises an input terminal connecting to the controller;
• a first output terminal;
• and a second output terminal;
• and said tap receives said command signals, address signals, and timing signals of said controller from said input terminal and separately sends out said command signals, address signals, and timing signals through said first output terminal and said second output terminal simultaneously;
• a plurality of memory modules,
• wherein said memory modules are separately disposed on said substrate;
• after a number of a part of said memory modules are separately connected in series with address wires and control wires, one in said part of said memory modules connects to said first output terminal;
• after a number of the other part of said memory modules are separately connected in series with address wires and control wires, another one in the other part of said memory modules connects to said second output terminal;
• and said memory modules store required instruction and information and separately send said command signals, address signals, and timing signals to said memory modules through said first output terminal and said second output terminal of said tap simultaneously to process instruction and read information by said controller;
• and
• at least two resistors,
• wherein said resistors are separately disposed on said substrate;
• one of said resistors connects to said one of said memory modules which connects to said first output terminal;
• another one of said resistors connects to said another one of said memory modules which connects to said second output terminal;
• and said resistors separately absorb reflected signals of said memory modules.