Hierarchical clock tree construction based on constraints

A method of automatically constructing a hierarchical clock tree for an integrated circuit, the method comprising:

• placing cells for a global clock tree on a first level based on first-level constraints;
• routing segments for the global clock tree on the first level based on the first-level constraints;
• creating clock routes for multiple instantiated partitions on a second level based on the global clock tree;
• pushing the global clock tree to the second level;
• and
• generating second-level constraints for the global clock tree in partitions on the second level, including the multiple instantiated partitions.

A method of constructing a hierarchical clock tree for an integrated circuit, the method comprising:

• placing cells in based on a global clock tree distribution topology with constraints;
• generating routes based on the global clock tree distribution topology with constraints;
• pushing the cells and routes from a first level to partitions on a second level;
• and
• implementing the global clock tree on the second level using engineering change orders (ECOs).