Output pole-compensated operational amplifier
AssigneeTexas Instruments Incorporated
InventorsAniruddha ROY, Saurabh PANDEY
Life of this patent
Estimating the term…
Abstract
A circuit includes a first transconductance stage having an output. The circuit further includes an output transconductance stage, and a first source-degenerated transistor having a first control input and first and second current terminals. The first control input is coupled to the output of the first transconductance stage. The circuit also includes a second transistor having a second control input and third and fourth current terminals. The third current terminal is coupled to the second current terminal and to the output transconductance stage.
Claims20
A circuit, comprising:
- a first transconductance stage coupled to an input node;
- an output transconductance stage;
- and
- a second transconductance stage coupled between the first transconductance stage and the output transconductance stage, the second transconductance stage including a first source-degenerated transistor.
A circuit, comprising:
- a first transconductance stage having an output;
- an output transconductance stage;
- a first source-degenerated transistor having a first control input and first and second current terminals, the first control input coupled to the output of the first transconductance stage;
- and
- a second transistor having a second control input and third and fourth current terminals, the third current terminal coupled to the second current terminal and to the output transconductance stage.
A circuit, comprising:
- a first transconductance stage having an output;
- a second transconductance stage having an input and an output, the input of the second transconductance stage coupled to the output of the first transconductance stage;
- an output transconductance stage;
- and
- a third transconductance stage coupled between the second transconductance stage and the output transconductance stage, the second transconductance stage including a first source-degenerated transistor having a first control input coupled to the output of the second transconductance stage.
Dependencies are inferred from the claim text.