Methods Of Forming An Array Of Capacitors, Methods Of Forming An Array Of Memory Cells Individually Comprising A Capacitor And A Transistor, Arrays Of Capacitors, And Arrays Of Memory Cells Individually Comprising A Capacitor And A Transistor

A semiconductor structure comprising:

• a first digit line;
• a first vertical transistor coupled to and extending vertically upward relative to the first digit line;
• a first capacitor having an electrode above and coupled to the first transistor;
• a second capacitor sharing a common plate with the first capacitor and having an electrode;
• a second transistor coupled to and elevationally-extending upwardly relative to the electrode of the second capacitor;
• and
• a second digit line above and coupled to the second transistor.

A semiconductor structure comprising:

• a first digit line;
• a first transistor coupled to and elevationally-extending upwardly relative to the first digit line;
• a first capacitor having an electrode above and coupled to the first transistor;
• a second capacitor sharing a common plate with the first capacitor and having an electrode;
• a second vertical transistor coupled to and extending vertically upward relative to the electrode of the second capacitor;
• and
• a second digit line above and coupled to the second transistor.

A semiconductor structure comprising:

• a first digit line;
• a first vertical transistor coupled to and extending vertically upward relative to the first digit line;
• a first capacitor having an electrode above and coupled to the first transistor;
• a second capacitor sharing a common plate with the first capacitor and having an electrode;
• a second vertical transistor coupled to and extending vertically upward relative to the electrode of the second capacitor;
• and
• a second digit line above and coupled to the second transistor.

A semiconductor structure comprising:

• a first digit line;
• a first transistor coupled to and elevationally-extending upwardly relative to the first digit line;
• a first capacitor having an electrode above and coupled to the first transistor;
• a second capacitor sharing a common plate with the first capacitor and having an electrode;
• a second transistor coupled to and elevationally-extending upwardly relative to the electrode of the second capacitor;
• a second digit line above and coupled to the second transistor;
• and
• at least one of the first and second transistors comprising a gate insulator comprising ferroelectric material.