Ic package with multiple dies
AssigneeTexas Instruments Incorporated
InventorTHOMAS DYER BONIFIELD
Life of this patent
Estimating the term…
Abstract
An integrated circuit (IC) package includes a first die with a first surface overlaying a substrate. The first die includes a first metal pad at a second surface opposing the first surface. The IC package also includes a dielectric layer having a first surface contacting the second surface of the first die. The IC package further includes a second die with a surface that contacts a second surface of the dielectric layer. The second die includes a second metal pad aligned with the first metal pad of the first die. A plane perpendicular to the second surface of the first die intersects the first metal pad and the second metal pad.
Claims20
An integrated circuit (IC) package comprising:
- a first die with a first surface overlaying a substrate, wherein the first die comprises a first metal pad at a second surface opposing the first surface;
- a dielectric layer having a first surface contacting the second surface of the first die;
- and
- a second die with a surface that contacts a second surface of the dielectric layer, the second die comprising a second metal pad aligned with the first metal pad of the first die, wherein a plane perpendicular to the second surface of the first die intersects the first metal pad and the second metal pad.
An integrated circuit (IC) package comprising:
- a first die with a first surface overlaying a first substrate, wherein the first die comprises a first metal pad at a second surface opposing the first surface;
- a second die comprising a second metal pad aligned with the first metal pad;
- a first protective overcoat layer contacting the second surface of the first die, wherein the first protective overcoat layer comprises a first recess that exposes a third metal pad positioned at the second surface of the first die;
- a second protective overcoat layer contacting a first surface of the second die;
- a non-conductive die adhesive (NCDA) layer sandwiched between the first protective overcoat and the second protective overcoat, wherein the first metal pad and the second metal pad form a capacitor that couples the first die with the second die, wherein the NCDA layer overlays a portion of the first protective overcoat layer that is spaced apart from the first recess;
- and
- a second substrate that contacts a second surface of the second die, wherein a second recess extending through the second substrate and an insulating layer of the second die exposes a portion of a metal layer to provide a fourth metal pad.
A method for forming an integrated circuit (IC) package, the method comprising:
- applying a protective overcoat to a first die wafer that includes a first die and a second die wafer that includes a second die, wherein a first surface of the first die overlays a substrate and a second surface of the first die comprises a first metal pad, and the second surface of the first die opposes the first surface of the first die;
- singulating the first die from the first die wafer and the second die from the second die wafer;
- applying a non-conductive die adhesive (NCDA) layer to the second surface of the first die;
- aligning a second metal pad positioned on a surface of the second die with the first metal pad of the first die;
- and
- adhering the second die to the NCDA layer to form a capacitor with the first metal pad and the second metal pad, wherein the capacitor couples the first die with the second die.
Dependencies are inferred from the claim text.