Semiconductor device, associated method and layout

A layout of an integrated circuit (IC), wherein the layout is stored on a non-transitory computer-readable medium, comprising:

• a plurality of gate strips, wherein each gate strip is arranged to be a gate terminal of a transistor;
• a plurality of first metal strips, formed above the plurality of gate strips, wherein each first metal strip and one of the gate strips are crisscrossed from top view;
• and
• a plurality of second metal strips, formed above the first metal strips, wherein each second metal strip and one of the first metal strips are crisscrossed from top view;
• wherein one of the first metal strips connects to one of gate strips crossing underneath by a first contact via without connecting to one of second metal strips crossing over;
• wherein a length between two adjacent gate strips is twice as a length between two adjacent second metal strips, and a length of said one of the first metal strips is smaller than two and a half times as the length between two adjacent gate strips.

A layout of an integrated circuit (IC), wherein the layout is stored on a non-transitory computer-readable medium, comprising:

• a first patterned layer, including a plurality of gate strips equally disposed and extending in a first direction, wherein every two immediately adjacent gate strip are distanced from a first length;
• a first conductive layer above the first patterned layer, including:
• a first conductive pattern, extending in a second direction and including a first row and a second row crossing over the plurality of gate strips;
• a second conductive pattern, extending in the second direction and disposed between the first row and the second row, wherein the second conductive pattern connects to one of the plurality of gate strips;
• and
• a second conductive layer above the first conductive layer, including a plurality of conductive strips equally disposed and extending in the first direction, wherein every two immediately adjacent conductive strip are distanced from a second length, and the first length is twice as the second length;
• wherein the second conductive pattern is free from connecting to the second conductive layer, and a length of the second conductive pattern in the second direction is smaller than two and a half times as the first length.