Integrated circuit structure of capacitive device

An integrated circuit structure, comprising:

• a first conductive plate, disposed in a first layer on a semiconductor substrate;
• a plurality of second conductive plates, disposed in the first layer;
• a plurality of conductive lines, disposed in the first layer, for covering the first conductive plate and the plurality of second conductive plates, wherein the plurality of conductive lines are electrically isolated from the plurality of second conductive plates;
• and
• a plurality of third conductive plates, disposed on a second layer on the semiconductor substrate;
• wherein the second layer is different from the first layer, the first conductive plate is physically separated from the plurality of second conductive plates, the plurality of conductive lines, and the plurality of third conductive plates, and the plurality of second conductive plates are substantially overlapped with the plurality of third conductive plates viewed from a top of the integrated circuit structure respectively.

An integrated circuit structure, comprising:

• a plurality of capacitors, disposed in a first layer on a semiconductor substrate, wherein each capacitor comprises:
• a first conductive plate, disposed in a first layer on a semiconductor substrate;
• and
• a plurality of conductive lines, disposed in the first layer, for surrounding the first conductive plate;
• a shielding structure, arranged to confine an electric field of the plurality of capacitors, wherein the shielding structure comprises:
• a second conductive plate, disposed in the first layer on a first side of the plurality of capacitors;
• a third conductive plate, disposed in a second layer on the semiconductor substrate, for extending to a second side of the plurality of capacitors from the first side of the plurality of capacitors;
• and
• a plurality of first conductive vias, arranged to couple the second conductive plate to an edge of the third conductive plate.

A method of manufacturing an integrated circuit structure, comprising:

• forming a first conductive plate in a first layer on a semiconductor substrate;
• forming a plurality of second conductive plates in the first layer;
• forming a plurality of conductive lines in the first layer to surround the first conductive plate and the plurality of second conductive plates, wherein the plurality of conductive lines are electrically isolated from the plurality of second conductive plates;
• and
• forming a plurality of third conductive plates on a second layer on the semiconductor substrate, wherein the second layer is different from the first layer, and the first conductive plate is physically separated from the plurality of second conductive plates, the plurality of conductive lines and the plurality of third conductive plates, and the plurality of second conductive plates are substantially overlapped with the plurality of third conductive plates viewed from a top of the integrated circuit structure respectively.