Nonvolatile memory device and operation method thereof

A nonvolatile memory device comprising:

• a peripheral circuit region including an input/output circuit, a first page buffer, a second page buffer, and at least one first metal pad;
• and
• a memory cell region vertically connected to the peripheral circuit region, and including a first memory cell, a second memory cell, and at least one second metal pad directly connected to the at least one the first metal pad,
• wherein:
• the first memory cell is connected to a first word line and a first bit line;
• the second memory cell is connected to the first word line and a second bit line;
• the input/output circuit is configured to output a first data bit, corresponding to a first DQ signal received on a first DQ line from an external device, through a first data line and to output a second data bit, corresponding to a first DQ signal received on a second DQ line from the external device, through a second data line;
• the first page buffer is connected to the first bit line and the first data line, and is configured to store a first latch value, based on the first data bit received through the first data line and a first DQ identifier for the first DQ line;
• and
• the second page buffer is connected to the second bit line and the second data line, and is configured to store a second latch value, based on the second data bit received through the second data line and a second DQ identifier for the second DQ line.