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AssigneeIntel Corporation
InventorsPrasoonkumar SURTI, Carsten BENTHIN, Karthik VAIDYANATHAN, Philip LAWS, Scott JANUS, Sven WOOP
Estimating the term…
Cluster of acceleration engines to accelerate intersections. For example, one embodiment of an apparatus comprises: a set of graphics cores to execute a first set of instructions of a primary graphics thread; a scalar cluster comprising a plurality of scalar execution engines; and a communication fabric interconnecting the set of graphics cores and the scalar cluster; the set of graphics cores to offload execution of a second set of instructions associated with ray traversal and/or intersection operations to the scalar cluster; the scalar cluster comprising a plurality of local memories, each local memory associated with one of the scalar execution engines, wherein each local memory is to store a portion of a hierarchical acceleration data structure required by an associated scalar execution engine to execute one or more of the second set of instructions; the plurality of scalar execution engines to store results of the execution of the second set of instructions in a memory accessible by the set of graphics cores; wherein the set of graphics cores are to process the results within the primary graphics thread.
A graphics processing apparatus, comprising:
A method comprising:
A non-transitory machine-readable medium having program code stored thereon which, when executed by a machine, is capable of causing the machine to perform:
Dependencies are inferred from the claim text.