Physical-Layer Quantum Error Suppression for Superconducting Qubits in Quantum Computation and Optimization
AssigneeMassachusetts Institute of Technology
InventorAndrew J. KERMAN
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AssigneeMassachusetts Institute of Technology
InventorAndrew J. KERMAN
Estimating the term…
A device combines physical qubits into a logical qubit according to a passive, quantum error-suppressing code, and weaves logical qubits into a fabric for performing computation or annealing according to an active, quantum error-correcting code. By using enough physical qubits in each logical qubit, the error suppression can overcome errors introduced by ambient noise, such as thermal fluctuations. However, interactions between individual logical qubits are based on interactions between multiple physical qubits, such as XX or ZZ interactions, so logical interactions require intermediary circuitry capable of coupling four or more spins—this circuitry also is described. Coupling an ancilla qubit to such intermediary circuitry allows the formation of a logical qubit having passive error suppression, and arbitrary computations can be performed using a fabric of such circuitry. Concatenating the active and passive codes does not increase circuit complexity, or reduce the speed of gate operations.
A method of error suppression, the method comprising:
A device comprising a logical qubit having a quantum state that has been encoded, in a first level, according to a passive quantum error-suppressing code to generate an encoded quantum state, the encoded quantum state having been further encoded, in a second level, according to an active quantum error-correcting code, wherein the encoding in the first level suppresses an effective error rate seen by the encoding in the second level.
An error suppression device comprising:
Dependencies are inferred from the claim text.