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US 2020/0350334 A1Published application
Semiconductor device and method of manufacturing the same
AssigneeSK hynix Inc.
InventorNam Jae LEE
Life of this patent
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Abstract
There are provided a semiconductor device and a method of manufacturing the same. A semiconductor device includes a memory block having local lines; a peripheral circuit disposed below the memory block; and a plurality of connection lines connecting the peripheral circuit and the local lines to each other, wherein the plurality of connection lines is stacked in a step shape.
Claims11
A semiconductor device comprising:
- a peripheral circuit;
- connection lines stacked on the peripheral circuit in a first direction, wherein the connection lines are electrically coupled to the peripheral circuit and stacked in a step shape;
- a memory cell array stacked on the connection lines in a first direction, wherein the memory cell array includes memory cells which are stacked in the first direction and word lines electrically coupled to the memory cells;
- and
- local lines extending in the first direction and electrically coupling the connection lines and the word lines, respectively.
2 more elements
A semiconductor device comprising:
- a peripheral circuit;
- a first line group stacked on the peripheral circuit and electrically coupled to the peripheral circuit, wherein the first line group includes first connection lines stacked in a step shape;
- a second line group stacked on the peripheral circuit and electrically coupled to the peripheral circuit, wherein the second line group includes second connection lines stacked in a step shape;
- a first memory block stacked on the first line group, wherein the first memory cell array includes first memory cells stacked on top of each other and first word lines electrically coupled to the first memory cells;
- a second memory block stacked on the second line group, wherein the second memory cell array includes second memory cells stacked on top of each other and second word lines electrically coupled to the second memory cells;
- first local lines electrically coupling the first connection lines and the first word lines, respectively;
- and
- second local lines electrically coupling the second connection lines and the second word lines, respectively.
5 more elements
A semiconductor device comprising:
- a peripheral circuit;
- a first line group stacked on the peripheral circuit and electrically coupled to the peripheral circuit, wherein first line group includes first connection lines stacked in a step shape;
- a second line group stacked on the peripheral circuit and electrically coupled to the peripheral circuit, wherein the second line group includes second connection lines stacked in a step shape;
- a memory cell array stacked on the first line group and the second line group, wherein the memory cell array includes first memory cells, second memory cells stacked on the first memory cells, first word lines electrically coupled to the first memory cells, and second word lines stacked on the first word lines and electrically coupled to the second memory cells;
- first local lines electrically coupling the first connection lines and the first word lines, respectively;
- and
- second local lines electrically coupling the second connection lines and the second word lines, respectively.
4 more elements
Dependencies are inferred from the claim text.