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US 2020/0350290 A1Published application
Stack packages including a fan-out sub-package
AssigneeSK hynix Inc.
InventorSeung Yeop LEE
Life of this patent
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Abstract
A stack package includes a package substrate and a fan-out sub-package mounted on the package substrate using first and second connection bumps. The fan-out sub-package includes a first semiconductor die and redistributed line (RDL) patterns. Second semiconductor dies are stacked on the package substrate to provide a first step structure, and third semiconductor dies are stacked on the second semiconductor dies to provide a second step structure. The second and third semiconductor dies are connected to the package substrate by bonding wires.
Claims20
A stack package comprising:
- a package substrate;
- a fan-out sub-package mounted on the package substrate using first connection bumps and second connection bumps;
- a first stack of second semiconductor dies stacked on the fan-out sub-package;
- a second stack of third semiconductor dies stacked on the second semiconductor dies;
- first bonding wires connected to the second semiconductor dies;
- and
- second bonding wires connected to the third semiconductor dies,
- wherein the package substrate comprises:
- first wire bond fingers connected to the first bonding wires;
- second wire bond fingers connected to the second bonding wires;
- first bump bond fingers to which the first connection bumps are connected;
- and
- second bump bond fingers to which the second connection bumps are connected, and
- wherein the fan-out sub-package comprises:
- an encapsulating layer embedding a first semiconductor die;
- first redistributed line (RDL) patterns extending from a surface of the first semiconductor die and connecting to the first connection bumps disposed on a bottom surface of the encapsulating layer;
- and
- second RDL patterns extending from the surface of the first semiconductor die and connecting the first semiconductor die to the second connection bumps disposed on the bottom surface of the encapsulating layer.
15 more elements
A stack package comprising:
- a package substrate;
- a fan-out sub-package mounted on the package substrate using first connection bumps and second connection bumps;
- second semiconductor dies stacked on the fan-out sub-package to provide a step structure;
- bonding wires connecting the second semiconductor dies to the package substrate;
- and
- dummy bumps disposed between the first connection bumps and the second connection bumps to structurally support the fan-out sub-package,
- wherein the fan-out sub-package comprises:
- an encapsulating layer embedding a first semiconductor die;
- first redistributed line (RDL) patterns extending from a surface of the first semiconductor die and connecting to the first connection bumps disposed on a bottom surface of the encapsulating layer;
- and
- second RDL patterns extending from the surface of the first semiconductor die and connecting the first semiconductor die to the second connection bumps disposed on the bottom surface of the encapsulating layer.
8 more elements
Dependencies are inferred from the claim text.