Method and system for reducing program disturb degradation in flash memory

A method of storing data, comprising:

• applying, by memory controller circuitry, a first voltage level to interface wordlines of interface memory cells of a memory cell string;
• applying, by the memory controller circuitry, one or more second voltage levels to other wordlines of the memory cell string;
• applying, by the memory controller circuitry, a third voltage level to one or more select gates of the memory cell string;
• transitioning, by the memory controller circuitry, the first voltage level to a fourth voltage level;
• applying, by the memory controller circuitry, the fourth voltage level to the interface wordlines of the interface memory cells of the memory cell string;
• transitioning, by the memory controller circuitry, the second voltage level to the fourth voltage level;
• and
• applying, by the memory controller circuitry, the fourth voltage level to the other wordlines of the memory cell string to reduce electron concentration in a channel of the memory cell during a subsequent program operation.

A non-transitory storage device that includes instructions that, when executed by memory controller circuitry, causes the memory controller circuitry to:

• apply a first voltage level to interface wordlines of interface memory cells of a memory cell string;
• apply one or more second voltage levels to other wordlines of the memory cell string;
• apply a third voltage level to one or more select gates of the memory cell string;
• transition the first voltage level to a fourth voltage level;
• apply the fourth voltage level to the interface wordlines of the interface memory cells of the memory cell string;
• transition the second voltage level to the fourth voltage level;
• and
• apply the fourth voltage level to the other wordlines of the memory cell string to reduce electron concentration in a channel of the memory cell during a subsequent program operation.