Fail redundancy circuits
AssigneeSK hynix Inc.
InventorsGeun Ho CHOI, Min Gyu PARK
Life of this patent
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Abstract
A redundancy circuit includes a selection control signal generation circuit and a column control circuit. The selection control signal generation circuit drives an internal node, which is initialized, to generate a selection control signal when a logic level of a latched address signal is different from a logic level of a fuse signal. The column control circuit buffers a pre-column selection signal based on the selection control signal to generate a column selection signal for execution of a column operation of cells or to generate a redundancy column selection signal for execution of the column operation of redundancy cells.
Claims20
A redundancy circuit comprising:
- a selection control signal generation circuit configured to drive an internal node, which is initialized, to generate a selection control signal when a logic level of a latched address signal is different from a logic level of a fuse signal;
- and
- a column control circuit configured to buffer a pre-column selection signal based on the selection control signal to:
- generate a column selection signal for execution of a column operation of cells;
- or
- generate a redundancy column selection signal for execution of the column operation of redundancy cells.
A redundancy circuit comprising:
- a comparison circuit configured to compare a latched address signal with a fuse signal based on an enablement pulse and a pre-charge signal to generate a comparison signal;
- an internal node drive circuit configured to drive an internal node based on the comparison signal;
- a selection control signal output circuit configured to buffer a signal of the internal node to output the buffered signal of the signal of the internal node as a selection control signal;
- and
- a column control circuit configured to buffer a pre-column selection signal based on the selection control signal to:
- generate a column selection signal for execution of a column operation of cells;
- or
- generate a redundancy column selection signal for execution of the column operation of redundancy cells.
Dependencies are inferred from the claim text.