Novel gate feature in finfet device

A semiconductor device, comprising:

• a substrate;
• a fin structure formed on a substrate;
• and
• a gate feature formed over the fin structure, the gate feature comprising a gate dielectric layer,
• wherein the gate dielectric layer traverses the fin structure to overlay a central portion of the fin structure and opposite side portions of the fin structure that are located in respective undercuts formed in respective portions of a dielectric layer located adjacent to opposite sidewalls of the gate feature, wherein the undercuts extend beyond respective sidewalls of the gate feature and away from the central portion of the fin structure.

A semiconductor device, comprising:

• a substrate;
• a fin structure formed on a substrate;
• a gate feature that traverses the fin structure to overlay a central portion of the fin structure, wherein the gate feature comprises a gate dielectric layer and at least a metal gate layer;
• and
• undercuts formed in respective portions of the dielectric layer located adjacent to opposite sidewalls of the gate feature, wherein the undercuts extend away from respective sidewalls of the gate feature and away from the central portion of the fin structure;
• and
• a pair of source/drain features formed along the fin structure and disposed at respective sides of the gate feature.