Methods of forming magnetoresistive devices and integrated circuits

A method of forming an integrated circuit device comprising:

• forming a first metal layer, wherein the first metal layer is patterned to support connections with a plurality of magnetoresistive devices;
• forming a plurality of magnetoresistive devices by:
• forming a bottom electrode;
• forming a magnetoresistive stack above the bottom electrode such that a width of the magnetoresistive stack is different than a width of the bottom electrode;
• and
• forming a top electrode above the magnetoresistive stack;
• forming a first interlayer dielectric layer above the first metal layer;
• forming first-level vias in the first interlayer dielectric layer;
• and
• forming a second metal layer over the first-level vias, wherein the first-level vias provide electrical connections between a corresponding magnetoresistive device of the plurality of magnetoresistive devices and the second metal layer.

A method of forming an integrated circuit device comprising:

• forming a first metal layer, wherein the first metal layer is patterned to support connections with a plurality of magnetoresistive devices;
• forming a plurality of magnetoresistive devices by:
• forming a bottom electrode;
• forming a magnetoresistive stack above the bottom electrode;
• and
• forming a top electrode above the magnetoresistive stack;
• forming a first interlayer dielectric layer above the first metal layer;
• forming vias in the first interlayer dielectric layer;
• and
• forming an M-via between the bottom electrode and first metal layer, wherein each M-via is formed coaxially with a magnetoresistive device of the plurality of magnetoresistive devices.

A method of forming an integrated circuit device comprising:

• forming a first metal layer, wherein the first metal layer is patterned to support connections with a plurality of magnetoresistive devices;
• forming a plurality of magnetoresistive devices by:
• forming a bottom electrode;
• forming a magnetoresistive stack above the bottom electrode;
• and
• forming a top electrode above the magnetoresistive stack;
• forming a first interlayer dielectric layer above the first metal layer;
• forming first-level vias in the first interlayer dielectric layer;
• forming a second metal layer over the first-level vias, wherein the first-level vias provide electrical connections between a corresponding magnetoresistive device of the plurality of magnetoresistive devices and the second metal layer;
• forming a second interlayer dielectric layer over the second metal layer;
• and
• forming second-level vias within the second interlayer dielectric layer, wherein the second level vias provide electrical connections between a third metal layer and the second metal layer.