Pixel structure and display panel

A pixel structure, comprising:

• a plurality of data lines spaced apart from each other, wherein the plurality of data lines electrically connected to a source driver;
• a plurality of scan lines spaced apart from each other, wherein the plurality of scan lines crossing the plurality of data lines, respectively, to form a plurality of pixel areas;
• and
• a plurality of connection lines disposed in parallel with the plurality of data lines and electrically connected to a gate driver;
• wherein the pixel structure comprises a plurality of active switches, and in each of the plurality of pixel areas, the plurality of connection lines are electrically connected to the plurality of scan lines, respectively;
• wherein the pixel structure is formed on an active switch array substrate of a display panel.

A display panel, comprising:

• an active switch array substrate;
• an color filter substrate disposed opposite to the active switch array substrate;
• and
• an liquid crystal layer formed between the active switch array substrate and the color filter substrate;
• wherein the active switch array substrate comprises:
• a source driver disposed on the active switch array substrate;
• a gate driver disposed on the active switch array substrate, wherein the source driver and the gate driver are disposed in the same direction on the active switch array substrate;
• a plurality of data lines spaced apart from each other and electrically connected to the source driver;
• a plurality of scan lines spaced apart from each other and crossing the plurality of data lines, respectively, to form a plurality of pixel areas;
• and
• a plurality of connection lines spaced apart from each other and electrically connected to the gate driver, wherein in each of the plurality of pixel areas, at least one of the plurality of connection lines is electrically connected to at least one of the plurality of scan lines;
• wherein lengths of the plurality of connection lines are gradually increased from a first side of the active switch array substrate to a second side of the active switch array substrate, and the plurality of connection lines are electrically connected to the plurality of scan lines, in sequential order, through the first side of the active switch array substrate, the first side is opposite to the second side;
• wherein the active switch array substrate comprises a first conductive layer and a second conductive layer, the plurality of scan lines are disposed in the first conductive layer, the plurality of connection lines are disposed in the second conductive layer, conductive vias are formed at each location where one of the plurality of connection lines crosses one of the plurality of scan lines corresponding thereto, and the plurality of connection lines are electrically connected to the plurality of scan lines corresponding thereto, through the conductive vias, respectively.