Spacer Etching Process For Integrated Circuit Design

A method, comprising:

• forming a first plurality of trenches in a first layer on a substrate;
• forming a second plurality of trenches in the first layer, wherein a first trench of the second plurality of trenches merges with two trenches of the first plurality of trenches to form a combined trench;
• and
• forming dielectric spacer features on sidewalls of the combined trench, wherein a first space between two opposing sidewalls of the first trench is completely filled by the dielectric spacer features.

A method, comprising:

• forming a first layer on a substrate;
• forming a first plurality of trenches in the first layer;
• forming a second plurality of trenches in the first layer, wherein a first trench of the second plurality of trenches connects two trenches of the first plurality of trenches to form a continuous trench;
• depositing a spacer layer over the first layer and in the continuous trench;
• and
• anisotropically etching the spacer layer to form spacer features on side surfaces of the continuous trench, wherein a first space between two opposing sidewalls of the first trench is completely filled by the spacer features.