US 2020/0286730 A1 · SEMICONDUCTOR DEVICE WITH A POROUS PORTION, WAFER COMPOSITE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE

Abstract

A semiconductor substrate includes a base portion, an auxiliary layer and a surface layer. The auxiliary layer is formed on the base portion. The surface layer is formed on the auxiliary layer. The surface layer is in contact with a first main surface of the semiconductor substrate. The auxiliary layer has a different electrochemical dissolution efficiency than the base portion and the surface layer. At least a portion of the auxiliary layer and at least a portion of the surface layer are converted into a porous structure. Subsequently, an epitaxial layer is formed on the first main surface.

Claims20

Dependent claims

A method of manufacturing a semiconductor device, comprising:

providing a semiconductor substrate that comprises a base portion, an auxiliary layer on the base portion, and a surface layer on the auxiliary layer, wherein the surface layer is in contact with a first main surface of the semiconductor substrate, and wherein the auxiliary layer has a different electrochemical dissolution efficiency than the base portion and the surface layer;
converting at least a portion of the auxiliary layer and at least a portion of the surface layer into a porous structure;
and
forming, after the converting, an epitaxial layer on the first main surface.

1 more element

Dependencies are inferred from the claim text.

Facts

Application

16/811,192Filed 6 Mar 2020

Priority

DE 102019105677.26 Mar 2019

Published

10 Sep 2020

Term ends

Not estimatedThe source records don’t support an estimate.

Classification18 codes

H10D 62/40
Semiconductor bodies, or regions thereof, of devices having potential barriers: crystalline structures
H10P 14/665
Characterised by the type of materials: porous materials
H10D 8/411
Diodes: pN diodes having planar bodies
H10D 12/441
Insulated-gate bipolar transistors [IGBT]: vertical IGBTs

Semiconductor device with a porous portion, wafer composite and method of manufacturing a semiconductor device

Life of this patent

Semiconductor device with a porous portion, wafer composite and method of manufacturing a semiconductor device

Life of this patent

Abstract

Claims20