Dynamic programing of valley margins of a memory cell
AssigneeMicron Technology, Inc.
InventorsMichael SHEPEREK, Larry J. KOUDELE, Bruce A. LIIKANEN
Life of this patent
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Abstract
A processing device determines difference error counts for a difference error that is indicative of a margin for a valley that is located between programming distributions of a memory cell of the memory component. A processing device scales each of the plurality of difference error counts by a respective scale factor of the scale factors. The processing device adjusts the valley margins of the memory cell in accordance with the scaled difference error counts.
Claims20
A system comprising:
- a memory component;
- and
- a processing device, operatively coupled with the memory component, to:
- determine a plurality of difference error counts for a difference error that is indicative of a margin for a valley that is located between programming distributions of a memory cell of the memory component;
- scale each of the plurality of difference error counts by a respective scale factor of a plurality of scale factors;
- and
- adjust valley margins of the memory cell in accordance with the plurality of scaled difference error counts.
A method comprising:
- determining a plurality of difference error counts for a difference error that is indicative of a margin for a valley that is located between programming distributions of a memory cell of a memory component;
- scaling each of the plurality of difference error counts by a respective scale factor of a plurality of scale factors;
- and
- adjusting, by a processing device, valley margins of the memory cell in accordance with the plurality of scaled difference error counts.
A non-transitory computer-readable medium comprising instructions that, when executed by a processing device, cause the processing device to:
- determine a plurality of difference error counts for a difference error that is indicative of a margin for a valley that is located between programming distributions of a memory cell of a memory component;
- scale each of the plurality of difference error counts by a respective scale factor of a plurality of scale factors;
- and
- adjust, by the processing device, valley margins of the memory cell in accordance with the plurality of scaled difference error counts.
Dependencies are inferred from the claim text.