Memory device and operating method thereof

A memory device comprising:

• a page including a plurality of memory cells;
• a peripheral circuit configured to perform at least one program loop, wherein the at least one program loop includes:
• a program voltage applying phase for applying, during a program operation, a program voltage to a word line to which the plurality of memory cells are coupled;
• and
• a program verify phase for determining whether a selected memory cell among the plurality of memory cells has been completely programmed;
• and
• control logic configured to control the peripheral circuit to:
• perform, during the program verify phase, an auxiliary verify operation of applying an auxiliary verify voltage to the word line;
• perform, during the program verify phase, a main verify operation of applying a main verify voltage larger than the auxiliary verify voltage to the word line;
• and
• determine a fail of the program operation, based on verify data obtained by performing the auxiliary verify operation and the main verify operation.