Nanosheet transistor with stable structure

A method of forming a semiconductor structure, the method comprising:

• forming at least one semiconductor material stack structure of alternating layers of a sacrificial semiconductor material and a semiconductor channel material on a surface of a semiconductor material pedestal region, wherein a shallow trench isolation structure laterally surrounds the semiconductor material pedestal region;
• forming, at the same time, a sacrificial gate structure on the shallow trench isolation structure, and another sacrificial gate structure on the semiconductor material pedestal region, wherein the sacrificial gate structure that is located on the shallow trench isolation structure has a length that is greater than a length of the another sacrificial gate structure that is located on the semiconductor material pedestal region;
• recessing physically exposed portions of the at least one semiconductor material stack structure to provide at least one nanosheet material stack of alternating nanosheets of sacrificial semiconductor material and semiconductor channel material located beneath the another sacrificial gate structure located on the semiconductor material pedestal region;
• forming an anchoring dielectric spacer laterally adjacent to the sacrificial gate structure located on the shallow trench isolation structure;
• removing the sacrificial gate structure and the another sacrificial gate structure to provide gate cavities;
• suspending each semiconductor channel material nanosheet;
• and
• forming a gate structure in each gate cavity, wherein the gate structure located over the shallow trench isolation structure has a length that is greater than a length of the gate structure located over the semiconductor material pedestal region.