Solid power semiconductor field effect transistor structure
AssigneeWai Yee LIU
InventorsXianda ZHAO, Wai Yee LIU, Johnny Kin On SIN
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Abstract
The present invention discloses a rugged power semiconductor field effect transistor structure, and through a special design, it solves the problem that the activation under a transient condition may result in failures on the device, so that there is no parasitic BJT, and thus the device is more rugged.
Claims19
A rugged power semiconductor field effect transistor structure, wherein the very bottom of the transistor structure is provided with a drain electrode, and a heavily doped drain region of a first conductivity type is provided at the top of the drain electrode, a lightly doped drift region of the first conductivity type is provided at the top of the heavily doped drain region of the first conductivity type, a heavily doped source region of a second conductivity type is provided on and covers part of the upper surface of the lightly doped drift region of the first conductivity type, a gate dielectric is provided at the top of the lightly doped drift region of the first conductivity type and the heavily doped source region of the second conductivity type, which covers above the lightly doped drift region of the first conductivity type and part of the top of the heavily doped source region of the second conductivity type, a gate electrode is provided at the top of the gate dielectric, an interlayer dielectric is provided at the top of the gate electrode, which covers above the gate electrode and contacts the upper surface of the heavily doped source region of the second conductivity type, and a source electrode covers the top of the interlayer dielectric, which contacts the heavily doped source region of the second conductivity type and is separated from the gate electrode by the interlayer dielectric.
A rugged power semiconductor field effect transistor structure, wherein the very bottom of the transistor structure is provided with an emitter electrode, a heavily doped emitter region of a second conductivity type is provided at the top of the emitter electrode, a lightly doped base region of a first conductivity type is provided at the top of the heavily doped emitter region of the second conductivity type, a heavily doped collector region of the second conductivity type is provided on and covers part of the upper surface of the lightly doped base region of the first conductivity type, a gate dielectric is provided at the top of the lightly doped base region of the first conductivity type and the heavily doped collector region of the second conductivity type, which covers above the lightly doped base region of the first conductivity type and part of the top of the heavily doped collector region of the second conductivity type, a gate electrode is provided at the top of the gate dielectric, an interlayer dielectric is provided at the top of the gate electrode, which covers above the gate electrode and contacts the upper surface of the heavily doped collector region of the second conductivity type, and a collector electrode covers the top of the interlayer dielectric, which contacts the heavily doped collector region of the second conductivity type and is separated from the gate electrode by the interlayer dielectric.
Dependencies are inferred from the claim text.