Automatic cover point generation based on register transfer level analysis
AssigneeInternational Business Machines Corporation
InventorsKousik Dan, Sandeep Korrapati
Life of this patent
Estimating the term…
Abstract
Cover points are automatically generated based on analysis of the hardware design represented in register transfer level (RTL) of a hardware description language. A cover point generator uses uncertainty of event occurrence, critical point analysis and redundancy elimination to determine consequential cover points for function verification. A user may provide input parameters to the cover point generator to define depth and width of cover events for generating cover points.
Claims20
An apparatus comprising:
- at least one processor;
- a memory coupled to the at least one processor;
- a cover point generator residing in the memory and executed by the at least one processor that analyzes a hardware design represented in a hardware description language, generates characteristic values for nodes and transitions of the hardware design and filters the nodes and transitions based on one or more parameters applied to the characteristic values to output a list of cover points, where the cover points identify locations in the hardware design where testing is needed for verification of the hardware design.
A computer-implemented method executed by at least one processor for cover point generation for a hardware design of an electronic circuit comprising:
- analyzes the hardware design represented in a hardware description language;
- generating characteristic values of nodes and transitions of the hardware design;
- filtering the nodes and transitions based on one or more parameters applied to the characteristic values to output a list of cover points, where the cover points identify locations in the hardware design where testing is needed for verification of the hardware design;
- and
- outputting the list of cover points.
A computer-implemented method executed by at least one processor for cover point generation for a hardware design of an electronic circuit comprising:
- analyzing the hardware design represented in register transfer level of a hardware description language;
- generating characteristic values of nodes and transitions of the hardware design;
- removing redundant nodes and transitions;
- generating a default parameter set based on the analysis of the hardware design wherein the parameters are an expression that includes one of the node and transition characteristics;
- allowing a user to modify the parameters and overwriting the default parameters with the user modified parameters;
- filtering the nodes and transitions based on one or more parameters applied to the characteristic values to output a list of cover points, where the cover points identify locations in the hardware design where testing is needed for verification of the hardware design;
- outputting the list of cover points;
- and
- wherein the characteristic values include node characteristics comprising total weight, in weight;
- out weight and improbability rating that is a value that represents the uncertainty that a node value will be changed when a circuit with the hardware design is in operation.
Dependencies are inferred from the claim text.