Control circuit, semiconductor device, and electrical circuit device

A semiconductor device, comprising an element portion,

• the element portion including
• a first element,
• a first resistance, and
• a second resistance lower than the first resistance,
• the first element including
• a first gate,
• a first collector,
• a first emitter,
• a semiconductor portion,
• a conductive portion,
• a first insulating region, and
• a second insulating region,
• the semiconductor portion including
• a first semiconductor region provided between the first collector and the first emitter in a first direction, the first direction being from the first collector toward the first emitter, the first semiconductor region being of a first conductivity type,
• a second semiconductor region provided between the first semiconductor region and the first emitter and electrically connected to the first emitter, the second semiconductor region being of the first conductivity type,
• a third semiconductor region provided between the first semiconductor region and the second semiconductor region in the first direction, the third semiconductor region being of a second conductivity type, and
• a fourth semiconductor region provided between the first semiconductor region and the first collector, the fourth semiconductor region including a plurality of first partial regions and a plurality of second partial regions, the plurality of first partial regions being of the first conductivity type, the plurality of second partial regions being of the second conductivity type, the plurality of first partial regions and the plurality of second partial regions being provided alternately in a direction crossing the first direction,
• a direction from the first gate toward a portion of the first semiconductor region and a direction from the first gate toward the third semiconductor region being aligned with a second direction crossing the first direction,
• a direction from the conductive portion toward a portion of the first semiconductor region and a direction from the conductive portion toward the third semiconductor region being aligned with the second direction,
• the first insulating region being provided between the first gate and the semiconductor portion and between the first gate and the first emitter,
• the second insulating region being provided between the conductive portion and the semiconductor portion and between the conductive portion and the first emitter,
• the first resistance being electrically connected to the first gate,
• the second resistance being electrically connected to the first gate.