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US 2020/0050102 A1Published application
Multiple-Mask Multiple-Exposure Lithography and Masks
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsPeter Yu, Chih-Tung Hsu, Kevin Wang, Chih-Chia Hu, Roger Chen
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Abstract
Examples of a multiple-mask multiple-exposure lithographic technique and suitable masks are provided herein. In some examples, a photomask includes a die area and a stitching region disposed adjacent to the die area and along a boundary of the photomask. The stitching region includes a mask feature for forming an integrated circuit feature and an alignment mark for in-chip overlay measurement.
Claims20
A method comprising:
- receiving a layout of an integrated circuit that includes functional shapes corresponding to functional features of the integrated circuit;
- dividing the layout into a first mask region and a second mask region, wherein a first region of the first mask region overlaps with a second region of the second mask region;
- defining a first alignment zone within the first region and a second alignment zone within the second region;
- allocating a first alignment shape in the first alignment zone and a second alignment shape within the second alignment zone;
- defining a first stitching zone within the first region and a second stitching zone within the second region;
- allocating a first functional shape in the first stitching zone and a second functional shape within the second stitching zone;
- separating the first mask region from the second mask region;
- and
- fabricating a first mask based on the first mask region such that the first mask includes a first mask feature corresponding to the first functional shape and a first alignment mark corresponding to the first alignment shape.
6 more elements
A method comprising:
- receiving a layout of an integrated circuit that includes functional shapes corresponding to functional features of the integrated circuit;
- dividing the layout into a first mask region and a second mask region, wherein a first region of the first mask region overlaps with a second region of the second mask region;
- allocating a first alignment shape to the first region and a second alignment shape to the second region;
- determining that the layout requires a first functional shape to be allocated to the first region and the second region;
- allocating the first functional shape to only the first region after determining that the layout requires the first functional shape to be allocated to the first region and the second region;
- and
- fabricating a first mask based on the first mask region and a second mask based on the second mask region.
4 more elements
A method comprising:
- receiving a layout that includes functional shapes corresponding to features of a mask for forming functional features of an integrated circuit;
- dividing the layout into a plurality of overlapping mask regions;
- defining alignment zones in the layout at boundaries between regions of the plurality of overlapping mask regions;
- inserting alignment shapes into the alignment zones;
- allocating the functional shapes and the alignment shapes among the plurality of overlapping mask regions;
- and
- providing the plurality of overlapping mask regions for fabricating masks of a multiple-mask multiple-exposure mask set.
4 more elements
Dependencies are inferred from the claim text.