Spin orbit torque magnetoresistive random access memory containing shielding element and method of making thereof

A Spin Orbit Torque (SOT) Magnetoresistive Random Access Memory (MRAM) device, comprising:

• a word line;
• a bit line;
• a SOT MRAM cell located between and coupled to the word line and the bit line;
• a first ferromagnetic shielding layer;
• a first insulating layer located between the first ferromagnetic shielding layer and one of the bit line or word line such that the bit line or word line is not electrically connected to the first ferromagnetic shielding layer;
• a second ferromagnetic shielding layer;
• and
• a second insulating layer located between the second ferromagnetic shielding layer and another one of the bit line or word line such that the other one of the bit line or word line is not electrically connected to the first or the second ferromagnetic shielding layers.

A method of making a Magnetoresistive Random Access Memory (MRAM) assembly, comprising:

• forming a first ferromagnetic shielding component over a substrate such that a surface of the ferromagnetic shielding component is co-planar with a surface of the substrate to within ±5°;
• depositing a first insulating layer over the ferromagnetic shielding component;
• depositing a first conductive layer over the first insulating layer;
• patterning the first conductive layer to form a plurality of word lines;
• forming a plurality of MRAM cells over the plurality of word lines;
• depositing a second insulating layer over the plurality of MRAM cells and the plurality of word lines;
• depositing a second conductive layer over the second insulating layer;
• patterning the second conductive layer to form a plurality of bit lines;
• depositing a third insulating layer over the plurality of bit lines;
• and
• forming a second ferromagnetic shielding component over the third insulating layer.

A method of making a Magnetoresistive Random Access Memory (MRAM) assembly, comprising:

• depositing a first conductive layer over a substrate;
• patterning the first conductive layer to form a plurality of word lines;
• forming a plurality of MRAM cells over the plurality of word lines;
• depositing a first insulating layer over the plurality of MRAM cells and the plurality of word lines;
• depositing a second conductive layer onto the first insulating layer;
• patterning the second conductive layer to form a plurality of bit lines;
• depositing a second insulating layer over the plurality of bit lines;
• depositing a first ferromagnetic shielding component over the second insulating layer such that a surface of the ferromagnetic shielding component is co-planar with a surface of the substrate to within ±5°;
• depositing a third insulating layer onto the first ferromagnetic shielding component;
• and
• forming a second ferromagnetic shielding component and a fourth insulating layer over the substrate prior to forming the first conductive layer.